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CEA-Leti reports record performance of nMOS devices fabricated with a maximum temperature of 500°C

VLSI 2021 Symposium Paper also Demonstrates First Low-Temperature Devices on Low-Temperature Silicon-on-Insulator Substrate Fabricated with Smart CutTM Technology

Published on 17 June 2021

GRENOBLE, France – June 17th, 2021 – CEA-Leti, a research institute at CEA, has demonstrated record performance in top-tier nMOSFETs using the institute’s 3D low-temperature (LT) sequential integration technology, CoolCubeTM

The paper being presented virtually at the VLSI 2021 Technology Symposium also provides guidelines for the junction optimization to improve the performance of devices fabricated with a maximum temperature of 500°C. In addition, for the first time, LT nMOS devices were integrated on LT silicon-on-insulator (LTSOI) fabricated with Smart CutTM technology.

The paper, “Record Performance of 500°C Low-Temperature nMOSFETs for 3D Sequential Integration using a Smart CutTM Layer Transfer Module”, says that “the high density of 3D contacts and the possible heterogeneous material/device integration it allows makes 3D sequential integration very interesting for More Moore and More than Moore applications,” but the maximum temperature of 500°C is critical.

The 500°C threshold is key in 3D sequential technologies because processing the upper-level transistors at temperatures higher than that can damage the metal interconnects and the silicide of the bottom-level transistors. CEA-Leti’s CoolCubeTM technology for top-level devices prevents the deterioration of bottom-level transistors. 

Shay Reboh, an author of the paper, said MOSFETs for logic or analog applications, as well as the co-integration with miniaturized smart sensors, will be the primary uses for 3D sequential integration. “The technological and commercial benefits of low-temperature layer transfer using Smart CutTM also include cost reduction and recycling of the donor wafer, compared to the use of SOI wafers, plus etch back,” he said.
Smart CutTM is Soitec’s proprietary wafer-bonding and layer-splitting technology that makes it possible to transfer a thin layer of crystalline material from a donor substrate to another substrate. 

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