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Silicon Photonics

​​​​​CEA-Leti's silicon photonics platform allows miniaturization, power efficiency, cost reduction and scalability of photonic integrated circuits (PIC). Pioneering silicon photonics for 20 years, CEA-Leti has designed a technology toolbox featuring state-of-the-art performance for communication, computing and sensing.

Published on 3 November 2023

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Silicon Photonics ​

SOI Technology​​​
The versatile silicon photonics platform offers a broad range of processes on 200 mm and 300 mm wafers, that leverage world-class pre-industrialization equipment. CEA-Leti's fabrication platform enables large-scale integration of active and passive devices, with amorphous Si, SiGe and Ge integration, in a flexible CMOS compatible process. 
  • Photonics SOI substrate with 220 nm or thicker Si
  • Selective Ge epitaxy
  • 6 implant levels for p-type and n-type for modulators and doped Si heaters
  • 3 silicon patterning steps for S​i heights of 0, 65, 165 and 310 nm (193nm immersion lithography)
  • 100nm standard smallest feature size
  • Silicide modulator contacts
  • Metal heater
  • Two-level metal interconnect
  • Deep trench for edge couple​

Silicon Nitride technology​​
Beyond SOI, this versatile photonics platform also offers PECVD SiN and LPCVD SiN technologies. This convergence of various photonic platforms combined into CEA-Leti's platform helps combining the advantages of each material and addressing numerous applications from visible to mid-infrared with the same technology. 
  • PECVD SiN: for low thermal shift and low refractive index layer to be combined with Silicon platform
  • LPCVD SiN : for Ultra-Low Loss circuits, non-linear optics, UV to NIR applications​


III-V on Si heterogeneous integration​​​
  • Heterogeneous integration of III-V on Si enables large-scale integration of lightsources. Collective die-to-wafer bonding of III-V on Si is performed with one or several different III-V epi layers enabling epi layers to be optimized for each laser and modulator.
  • This versatility offers unique PIC integrations and competitive solutions.
  • Back-end of line processes are available for an integration of PIC with Electronic Integrated Circuits. Co-packaging solutions include 3D post-processes such as UBM, bumps, µ-pillars, photonics Through Silicon Via (TSV).
  • Access to the platform is possible through MPW with broker EuroPractice / CMP or dedicated run.




Discover CEA-Leti’s technologies ​


More Info...

  • Communication : ​Telecom, Datacom, 5G infrastructures, quantum technologies for cybersecurity
  • Computing : ​ Computer communication for High Performance Computing (HPC), quantum computing and neuromorphic computing for AI
  • Sensing : ​ Gas sensing, Biosensors, structural health monitoring and 3D sensing such as LIDAR​​
​​​Facilities​​​ ​​​


Strategic axes​​​​ ​​​

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